SpecificationsAbsolute Maximum Ratings
Parameters | Symbol | Limit Values | Unit | ||
min. | typ. | max. | |||
Supply voltage | Vcc | -0.3 | 6 | V | |
Input voltage | Vi | -0.3 | 6 | V | |
Storage temperature | Tsto | -40 | 125 | ℃ | |
Power dissipation | Ptot | 60 | mW | ||
DC Characteristics
Parameters | Symbol | Limit Values | Unit | ||
min. | typ. | max. | |||
Supply voltage | Vcc | 2.7 | 5 | 5.5 | V |
Supply current | Icc | 3 | 10 | mA | |
H input voltage (I/O,CLK,RST) | Vih | 3.5 | Vcc | V | |
L input voltage (I/O,CLK,RST) | Vil | 0 | 0.8 | V | |
H input current (I/O,CLK,RST) | Ih | 3.9 | 10 | uA | |
L output current(Vl=0.4V,open drain) | Iol | 0.5 | mA | ||
H leakage current (Vl=Vcc,open drain) | Ioh | 10 | uA | ||
Input capacitance | Ci | 10 | pF | ||
Clock frequency | f | 20 | KHz | ||
Test pin | T | Open or on Vss | |||
AC Characteristics
Parameters | Symbol | Limit Values | Unit | ||
min. | typ. | max. | |||
Reset time | tRE | 9 | us | ||
CLK (count, H level) | tH | 10 | us | ||
CLK (count, L level) | tL | 10 | us | ||
Write time | tW | 5 | ms | ||
Erase time | tE | 5 | ms | ||
Setup time (D/CLK) | td1 | 4 | us | ||
Setup time (CLK/RST) | td3 | 4 | us | ||
Setup time (RST/CLK) | td4 | 4 | us | ||
Hold time (D/CLK) | td5 | 4 | us | ||
Delay time (CLK/D) | td2 | 6 | us | ||
Rise time (I/O,CLK,RST) | tR | 1 | us | ||
Fall time (I/O,CLK,RST) | tF | 1 | us | ||
CharacteristicsThis chip contains an EEPROM organized 1024 x 8 bit offering the possibility of programmable write protection for each byte.
All the memory, except for the PSC, can always be read.
All the memory is writable/erasable before the protect bit is enabled. After setting the protect bit, the memory is read only.
The (write) protect bit is only one time programmable and can not be erased.
This chip has a PSC verification logic. After 8 successive incorrect entries the error counter will block any subsequent attempt at PSC verification and hence any possibility to write and erase.
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